Electron Beam Induced Current (EBIC) characterization on cross-section of a semiconductor device is one of the few failure analysis techniques available to localize defects in depth of the layers. It highlights PN junctions which gives information on the doping profiles and concentrations as well as on the diffusion and recombination of minority carriers.
Cross-section EBIC sample preparation requires to mount the sample on a cross-sectioning paddle, polish its side and inspect it in a scanning electron microscope to determine if the region of interest has been revealed. Few polishing/inspection steps can be necessary to reach the desired location.
In this application note, we describe the EBIC measurement at a cross-section of a transistor array using a process that saves a great amount of sample preparation time. The sample is kept on the cross-sectioning paddle during polishing, inspection and probing, saving polishing tool alignment time and sample handling.
This is achieved by using the Imina Technologies’ Large Sample Adapter with the Nanoprobing Platform. With this assembly, measurements of millimeters high and/or wide samples (e.g. 2” wafers) becomes possible.
Electrical failure analysis and semiconductor defect localization techniques
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